Tony Nowatzki

Tony Nowatzki


Engineering VI - Room 468B

Phone: (310) 825-8807
Fax: (310) 794-5057


  • Hardware/software co-design
  • Modeling and optimization

Conference and Workshop Publications

T. Nowatzki, V. Gangadhar, N. Ardalani, K. Sankaralingam Stream-Dataflow Acceleration. ISCA 2017.

T. Nowatzki, V. Gangadhar, K. Sankaralingam, G. Wright Pushing the Limits of Accelerator Efficiency While Retaining Programmability. HPCA 2016.

T. Nowatzki, K. Sankaralingam Analyzing Behavior Specialized Acceleration. ASPLOS 2016.

M. Watkins, T. Nowatzki, A. Carno. Software Transparent Dynamic Binary Translation for Coarse-Grain Reconfigurable Architectures.. HPCA 2016.

T. Nowatzki, V. Gangadhar, K. Sankaralingam Exploring the Potential of Heterogeneous Von Neumann/Dataflow Execution Models. ISCA 2015. [IEEE Micro Top Picks 2016]

T. Nowatzki, J. Menon, C. Ho, K. Sankaralingam gem5, GPGPUSim, McPAT, GPUWattch, "Your favorite simulator here" Considered Harmful. WDDD 2014.

V. Govindaraju, T. Nowatzki, K. Sankaralingam Breaking SIMD Shackles with an Exposed Flexible Microarchitecture and the Access Execute PDG. PACT 2013.

T. Nowatzki, M. Sartin-Tarm, L. De Carli, K. Sankaralingam, C. Estan, B. Robatmili A General Constraint-centric Scheduling Framework for Spatial Architectures. PLDI 2013. [Distinguised Paper Award]

J. Benson, R. Cofell, C. Frericks, C. Ho, V. Govindaraju, T. Nowatzki , K. Sankaralingam. Design Integration and Implementation of the DySER Hardware Accelerator into OpenSPARC. HPCA 2012.

Journal and Magazine Publications

T. Nowatzki, V. Gangadhar, K. Sankaralingam, G. Wright Domain Specialization is Generally Unnecessary for Accelerators. IEEE Micro Top Picks in Computer Architecture 2017.

G. Gupta, T. Nowatzki, V. Gangadhar, and K. Sankaralingam, Kickstarting Semiconductor Innovation with Open Source Hardware. IEEE Computer 2017

T. Nowatzki, V. Govindaraju, K. Sankaralingam A Graph-Based Program Representation for Analyzing Hardware Specialization Approaches. er Architecture Letters, 2015. [Best of CAL]

T. Nowatzki, J. Menon, C. Ho, K. Sankaralingam Architectural Simulators Considered Harmful. IEEE Micro 2015.

A. Yazdanbakhsh, R. Balasubramanian, T. Nowatzki, K. Sankaralingam Comprehensive Circuit Failure Prediction and Detection for Logic and SRAM using Virtual Aging, Sampled Redundancy, and Asymmetric Checkers. IEEE Micro 2015.

T. Nowatzki, M. Sartin-Tarm, L. De Carli, K. Sankaralingam, C. Estan, B. Robatmili A Scheduling Framework for Spatial Architectures Across Multiple Constraint-solving Theories. TOPLAS 2014.

M. Sartin-Tarm, T. Nowatzki, L. De Carli, K. Sankaralingam Constraint-centric Scheduling Guide. Computer Architecture News 2013.

V. Govindaraju, C. Ho, T. Nowatzki, J. Chhugani, N. Satish, K. Sankaralingam, and C. Kim DySER: Unifying Functionality and Parallelism Specialization for Energy-Efficient Computing. IEEE Micro 2012.


T. Nowatzki , M. Ferris, K. Sankaralingam, C. Estan, N. Vaish, D. Wood

Optimization and Mathematical Modeling in Computer Architecture. Morgan & Claypool Synthesis Lectures on Computer Architecture 2013. Interactive Demos
PhD (2016) University of Wisconsin – Madison
  • MICRO Best Paper Runner-Up Award, 2022
  • NSF Career Award, 2018
  • IEEE Micro Top Picks, 2016
  • Best of CAL, 2015