Jason (Jingsheng) Cong

Jason (Jingsheng) Cong

DISTINGUISHED PROFESSOR
COMPUTER SCIENCE

Volgenau Chair for Engineering Excellence

Engineering VI - Room 468A

Email: cong@cs.ucla.edu
Phone: (310) 206-2775
Fax: (310) 794-5057

Websites

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Volgenau Chair for Engineering Excellence
Director, Center for Customizable Domain-Specific Computing
Director, VLSI Architecture, Synthesis, and Technology (VAST) Laboratory (former VLSI CAD Laboratory)

JASON CONG received his B.S. degree in computer science from Peking University in 1985, his M.S. and Ph. D. degrees in computer science from the University of Illinois at Urbana-Champaign in 1987 and 1990, respectively. Currently, he is the Volgenau Chair for Engineering Excellence in the UCLA Computer Science Department (with joint appointment in the Department of Electrical and Computer Engineering), the Director of Center for Domain-Specific Computing (funded by NSF Expeditions in Computing Award), and the director of VLSI Architecture, Synthesis, and Technology (VAST) Laboratory. He served as the chair of the UCLA Computer Science Department from 2005 to 2008. He was elected to an IEEE Fellow in 2000, an ACM Fellow in 2008, a member of the National Academy of Engineering in 2017, and a Fellow of the National Academy of Inventors in 2020.
RESEARCH AND INTERESTS
Dr. Cong’s research interests include electronic design automation, customized computing for machine learning and big-data applications, quantum computing, and highly scalable algorithms. He has published over 500 research papers in these areas, including 16 Best Paper Awards (IEEE T-CAD’95, IPSD’05, HPCA'08, SASP'09, FCCM'11, FPGA’13, ISSS+CODES’13, ACM TODAES 2005, 2012, and 2013, MEMSYS'17,  ISLPED'18, FPGA'19, T-CAD'19, ICCAD'19, and FPGA'21). He also received three 10-Year Retrospective Most Influential Paper Award at ICCAD'14, ASPDAC'15, and ASPDAC'17, respectively.  His work on FPGA technology mapping (FlowMap) received the 2011 ACM/IEEE A. Richard Newton Technical Impact Award in Electric Design Automation “for pioneering work on technology mapping for FPGA that has made significant impact to the FPGA research community and industry”, and was the first inducted to the FPGA and Reconfigurable Computing Hall of Fame by ACM TCFPGA.  He was elected to an IEEE Fellow in 2000 for "for seminal contributions in computer-aided design of integrated circuits, especially in physical design automation, interconnect optimization, and synthesis of FPGAs", and ACM Fellow in 2008 "for contributions to electronic design automation".   He received the 2010 IEEE Circuits and System (CAS) Society Technical Achievement Award "For seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation" and the 2016 IEEE Computer Society Technical Achievement Award “For setting the algorithmic foundations for high-level synthesis of field programmable gate arrays”.   Dr. Cong was elected as a member of the National Academy of Engineering in 2017 “for pioneering contributions to application-specific programmable logic via innovations in field programmable gate array (FPGA) synthesis”, and a Fellow of the National Academy of Inventors in 2020.  He received the University Research Award from the Semiconductor Industry Association (SIA) and the Semiconductor Research Corporation (SRC) for "research efforts to advance US semiconductor technology" in 2019.
In 2009, Dr. Cong led a group of twelve faculty members from UCLA, Rice, Ohio-State, and UC Santa Barbara and won an highly competitive NSF Expeditions in Computing Award (for $10M over five years). This award led to the establishment of the Center for Domain-Specific Computing (CDSC), which looks beyond parallelization and focuses on domain-specific customization to achieve drastic power-performance efficiency improvement. In 2014, Dr. Cong led the team won the very first award under the NSF Innovation Transition (InTrans) Program with additional $3M funding led by the Intel Corporation with matching support from NSF. This award supports the CDSC team to apply domain-specific computing to multiple critical applications in the health care domain.
Dr. Cong’s research publications have close to 30,000 citations according to Google Scholar with an H-index of 90 as of April 2021.  He is a frequent keynote speaker in major conferences in his fields, such as the IEEE Conference on Field-Programmable Technology (FPT'2005 and again in FPT'2014), the International Conference on Field Programmable Logic and Applications (FPL'2009), the IEEE Symposium on Application Specific Processors (SASP'2010), the IEEE International Conference on Application-Specific Systems (ASAP'2011), the Workshop on Synthesis and System Integration of Mixed Information technologies (2012), the Workshop on the Intersections of Computer Architecture and Reconfigurable Logic (2012), Intel Design and Test Technology Conference (DTTC'2012), the IEEE International Symposium on Circuits and Systems (ISCAS'2013), IEEE International Conference on Computer Design (ICCD'2013),  IEEE International Symposium on Low Power Electronics and Design (ISLPED'2014), IFIP/IEEE VLSI-SoC (2014),  IEEE International System-on-Chip Conference, (SOCC'15), the Asia and South Pacific Design Automation Conference (ASP-DAC' 2016 and 2020), IEEE International Conference on Networking, Architecture, and Storage (NAS 2016),  Conference on Advanced Computer Architecture (ARA’2016),  CNCC'2017,  Asia and South-Pacific Design Automation Conference (ASPDAC'2020), and the International Parallel and Distributed Processing Symposium (IPDPS'2021).
Dr. Cong is a successful serial entrepreneur.  He was the founder and the president of Aplus Design Technologies (1999 – 2003), a UCLA spin-off that developed the first commercially available FPGA architecture evaluation tool and physical synthesis tool, which were licensed by most FPGA companies and OEMed to their customers. Aplus was acquired by the Magma Design Automation in 2003 (now part of Synopsys). Dr. Cong was also a co-founder and the chief technology advisor of AutoESL Design Technologies (2006-2011), another UCLA spin-off that commercialized the research from his lab on high-level synthesis (HLS) for automatic synthesis of behavior-level C/C++ specifications into highly optimized RTL code – an effort that many EDA companies tried but failed for over two decades. The AutoESL tool (renamed to Vivado HLS after Xilinx acquisition in 2011) becomes the most successful and most widely used FPGA HLS tool in the history, with over tens of thousands of users worldwide. He was also a co-founder and the chief scientist of Neptune Design Automation (2011-2013), which produced the fastest and most scalable FPGA physical design tool at its time (acquired by Xilinx in 2013).  He was a co-founder, the chairman and chief scientific advisor of Falcon Computing Solutions,  which provides compilation tool and accelerator IPs to enable FPGA-based acceleration for data centers and edge computing (again acquired by Xilinx in 2020).
Dr. Cong has also served on the Technical Advisory Board of a number of EDA and silicon IP companies, such as Atrenta (acquired by Synopsys in 2015)eASIC (acquired by Intel in 2018), Get2Chip (acquired by Cadence in 2003), Inspirit IoT, Magma Design Automation (acquired by Synopsys in 2012), and Microsoft Research Asia (MSRA).
Dr. Cong has graduated 41 PhD students. Two of them are now IEEE Fellows,  six of them got the highly competitive NSF Career Award, one of them received the ACM SIGDA Outstanding Dissertation Award, and another received the EDAA Outstanding PhD Dissertation Award.   Thirteen of his students and postdocs are now faculty members in major research universities worldwide, including Colorado State Univ., Cornell, Fudan Univ, Georgia Tech., Inha University, Peking Univ, Purdue, Simon Fraser, SUNY Binghamton, UCLA, UIUC, University of Pittsburgh, and UT Austin. Many others are in key R&D or management positions in various companies related to the information technologies, such as Amazon,  Arista,  Bloomberg,  Broadcom,  Cadence,  Facebook,  GoogleIBM,  Intel,  Micron,  Synopsys,  and Xilinx.   Also, several of Dr. Cong’s PhD students and postdocs were co-founders, together with Dr. Cong, of tthree startups originated from UCLA – Aplus Design Technologies (acquired by Magma in 2003, now part of Synopsys) AutoESL Design Technologies, and Falcon Computing Solutions (both acquired by Xilinx, in 2011 and 2020, respectively).
  • Computer-aided design of VLSI circuits and systems
  • Reconfigurable architecture and reconfigurable computing
  • Design and analysis of algorithms
  • Computer architectures
EDUCATION
  • Ph.D. in Computer Science:  University of Illinois at Urbana-Champaign, 1990
  • M.S. in Computer Science: University of Illinois at Urbana-Champaign, 1987
  • B.S. in Computer Science: Peking University, 1985
AWARDS AND RECOGNITION
  • FPGA Best Paper Award, March 2022.
  • FPGA Reconfigurable Computing Hall of Fame, March 2022.
  • IEEE Robert N. Royce Medal, December 2021.
  • FPGA Best Paper Award, March 2021.
  • National Academy of Inventors Fellow, December 2020.
  • Volgenau Chair for Engineering Excellence | Samueli School of Engineering, October 2020.
  • William J. McCalla ICCAD Best Paper Award, November 2019.
  • SIA University Researcher Award, November 2019.
  • Outstanding Oversea Contribution Award by the China Computer Federation (CCF), October 2017.
  • Best Paper Award, the International Symposium on Memory Systems (MEMSYS), Oct 2017, for the paper “AIM: Accelerating Computational Genomics through Scalable and Noninvasive Accelerator-Interposed Memory”.
  • PhD advisor of Bingjun Xiao whose dissertation “Communication Optimization for Customizable Domain-Specific Computing” received the 2016 EDAA Outstanding PhD Dissertation Award.
  • FPGA and Reconfigurable Computing Hall of Fame Program inducted the paper "Flow Map: An Optimal Technology Mapping Algorithm for Delay Optimization in Look-Up Table Based FPGA Designs” into the inaugural class of the Hall of Fame, 2017.
  • Member of the National Academy of Engineering, among the highest honors that can be accorded to an American engineer “for pioneering contributions to application-specific programmable logic via innovations in field programmable gate array (FPGA) synthesis”, 2017.
  • The ASP-DAC’17 10-Year Retrospective Most Influential Paper Award for the paper entitled “Thermal-Aware 3D IC Placement Via Transformation” published in ASP-DAC in 2007.
  • IEEE Computer Society Technical Achievement Award (2016), “For setting the algorithmic foundations for high-level synthesis of field programmable gate arrays”.
  • The ASPDAC’15 Ten Year Retrospective Most Influential Paper Award for the paper titled “Thermal-Driven Multilevel Routing for 3-D ICs” published in ASPDAC’2005, Asia South-Pacific Design Automation Conference (ASPDAC), Jan. 20, 2015.
  • The ICCAD’14 Ten Year Retrospective Most Influential Paper Award for the paper titled “A Thermal-Driven Floorplanning Algorithm for 3D ICs” published in ICCAD 2004 Conference, International Conference on Computer-Aided Design (ICCAD), November 3, 2014.
  • Distinguished Alumni Achievement Award from the Department of Computer Science at the University of Illinois at Urbana-Champaign, October 24, 2014.
  • Best Paper Award, 2013 International Conference on Hardware/Software Co-design and System Synthesis (CODES+ISSS 2013) for the paper “Improving Polyhedral Code Generation for High-Level Synthesis”.
  • The 50th Design Automation Conference Prolific Author Award -- DAC 40 Club for publishing 40-49 papers in the first 50 years of DAC.
  • PhD advisor of Dr. Guojie Luo whose thesis entitled "Placement and Design Planning for 3D Integrated Circuits" received the 2013 ACM SIGDA Outstanding PhD Dissertation Award in electronic design automation.
  • 2013 ACM Transactions on Design Automation of Electronic Systems (TODAES) Best Paper Award for "“Automatic Memory Partitioning and Scheduling for Throughput and Power Optimization, ” published in March 2011.
  • Best Paper Award, 2013 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays (for the paper “Polyhedral-Based Data Reuse Optimization for Configurable Computing”).
  • 2012 ACM Transactions on Design Automation of Electronic Systems (TODAES) Best Paper Award for "Behavior-Level Observability Analysis for Operation Gating in Low-Power Behavioral Synthesis” published in Nov. 2010.
  • IBM Faculty Award (three times), 2002, 2006, and 2012.
  • Two papers of Dr. Cong and his former students (in FPGA’95 and FPGA’99) were selected for FPGA20: the most significant contributions in the FPGA Symposium from 1992 – 2001.
  • ACM/IEEE A. Richard Newton Technical Impact Award in Electric Design Automation (2011), “for pioneering work on technology mapping for FPGA that has made significant impact to the FPGA research community and industry.”
  • Best Paper AwardIEEE Symposium on Field-Programmable Custom Computing Machines (2011)
  • IEEE Circuits and System (CAS) Society Technical Achievement Award (2010), “for seminal contributions to electronic design automation, especially in FPGA synthesis, VLSI interconnect optimization, and physical design automation.”
  • Best Paper Award, 2009 IEEE Symposium on Application Specific Processors (SASP)
  • Semiconductor Research Corporation Inventor Recognition Award (2009)
  • ACM Fellow (2008),“for contributions to electronic design automation”.
  • Best Paper Award, 2008 Int’l Symposium on High Performance Computer Architecture (HPCA)
  • Semiconductor Research Corporation Inventor Recognition Award (2006)
  • Outstanding Alumni Award of Peking University (2005)
  • Best Paper Award, 2005 International Symposium on Physical Design (ISPD) (April 2005)
  • Best Paper Award, ACM Transaction on Design Automation of Electronic Systems (TODAES) (2005)
  • Distinguished Lecturer, IEEE Circuits and Systems Society (2004-2005)
  • Okawa Foundation Research Grant (2004)
  • Semiconductor Research Corporation Technical Excellence Award (2000), for his work in area "Interconnect Estimation Planning and Synthesis for Deep Sub-micron Designs"
  • IEEE Fellow (2000) “for seminal contributions in computer-aided design of integrated circuits, especially in physical design automation, interconnect optimization, and synthesis of field-programmable gate-arrays.”
  • Semiconductor Research Corporation Inventor Recognition Award (2000)
  • Guest Professorship, Peking University (2000)
  • ACM SIGDA Meritorious Service Award (1998)
  • ACM Recognition of Service Award (1997)
  • Best Paper Award of IEEE Transactions on Computer-Aided Design from IEEE Circuits and System Society (1995)
  • National Science Foundation Young Investigator Award (1993)
  • Northrop Corporation Outstanding Junior Faculty Research Award from UCLA (1993)
  • National Science Foundation Engineering Research Initiation Award (1991)
  • Ross J. Martin Award for Excellence in Research from University of Illinois (1989)
  • DEC Fellowship in Computer Science (1988)
  • Best Graduate Award from Peking University (1985)