C.K. Ken Yang

C.K. Ken Yang

PROFESSOR
ELECTRICAL AND COMPUTER ENGINEERING

Chairman of ECE Department

56-147A Engr. IV

Email:
Phone: (310) 206-3665

RESEARCH AND INTERESTS
High-performance VLSI design, digital and mixed-signal circuit design, high-performance data communications and networking
NOTABLE PUBLICATIONS
  1. M. Elhebeary; C.K. Yang, “A 92%-Efficiency Battery Powered Hybrid DC-DC Converter for IoT Applications”, IEEE Transactions on Circuits and Systems I: Regular Papers,
  2. L.Y. Chen; C.K. Yang, “A 19-GHz Pulsed-Coherent ToF Receiver With 40- μ m Precision for Laser Ranging Systems”, IEEE Solid-State Circuits Letters, vol. 2, no. 9, Sept. 2019, pp. 191-94
  3. M.S. Chen; C.K. Yang, “A 50–64 Gb/s Serializing Transmitter With a 4-Tap, LC-Ladder-Filter-Based FFE in 65 nm CMOS Technology“, IEEE Journal of Solid-State Circuits, vol. 50, no. 8, Aug. 2015, pp. 1903-16
  4. T. Ali, R. Drost, R. Ho, C.K. Yang, “A 100+ Meter 12Gb/s/Lane Copper Cable Link Based on Clock-Forwarding”, IEEE Journal of Solid-State Circuits, vol. 48, no. 4, Apr. 2013, pp. 1085-1098
  5. R. Yousry, M.S. Chen, M.F Chang, C.K. Yang, “An architecture-reconfigurable 3b-to-7b 4GS/s-to-1.5 GS/s ADC using subtractor interleaving”, IEEE Asian Solid-State Circuits Conference (A-SSCC), Nov. 2013 pp 285-288
  6. M.S. Chen, A.A. Hafez, C.K. Yang, “A 0.1-1.5 GHz 8-bit inverter-based digital-to-phase converter using harmonic rejection”, Proceedings of the 2012 Custom Integrated-Circuits Conference, Nov. 2012 pp., Kobe, Japan, pp. 145-148
  7. E.H. Chen, R. Yousry, C.K. Yang, “Power Optimized ADC-Based Serial Link Receiver“, IEEE Journal of Solid-State Circuits, vol. 47, no. 4, Apr. 2012, pp. 938-951
  8. A. Hafez, C.K. Yang, “Design and Optimization of Multipath Ring Oscillators“, IEEE Transaction on Circuits and Systems I: Regular Papers, vol. 58, no. 10, Oct. 2011, pp. 2332-2345
  9. J. Kim, E.H. Chen, J.H. Ren, B.S. Leibowitz, P. Satarzadeh, J.L. Zerbe, C.K. Yang, “Equalizer Design and Performance Trade-Offs in ADC-Based Serial Links“, IEEE Transaction on Circuits and Systems I: Regular Papers, vol. 58, no. 9, Sept. 2011, pp. 2096 – 2107
  10. J. Kim, R. Jhaveri, J. Woo, C.K. Yang, “Device-Circuit Co-Optimization for Mixed-mode Circuit Design via Geometric Programming,” 2007 International Conference on Computer Aided Design, Session November 4-8, pp. 470-5
EDUCATION
1992, B.S. and M.S. in Electrical Engineering, Stanford University1998, Ph.D. in Electrical Engineering, Stanford University
AWARDS AND RECOGNITION
  • Fellow of the IEEE
  • Northrup Grumman Excellence in Teaching Award (2003)
  • IBM Faculty Development Fellowship