Behzad Razavi

Behzad Razavi

PROFESSOR
ELECTRICAL AND COMPUTER ENGINEERING

56-147F Engr. IV

Email: razavi@ee.ucla.edu
Phone: (310) 206-1633

Websites

RESEARCH AND INTERESTS
Analog, RF, mixed-signal integrated circuit design, dual-standard RF transceivers, phase-locked systems and frequency synthesizers, A/D and D/A converters, high-speed data communication circuits
NOTABLE PUBLICATIONS
AWARDS AND RECOGNITION
  • 2014, ASEE PSW Outstanding Teaching Award awarded by the American Society for Engineering Education, the citation reads, “For his superlative teaching and his seminal textbooks.”
  • 2013, Best Paper Award in the IEEE Custom Integrated Circuits Conference H.Wei and B. Razavi, “An 8-Bit 4-GS/s 120-mW CMOS ADC,” Proc. IEEE Custom Integrated Circuits Conference, Sept. 2013.
  • 2012, IEEE Donald O. Pederson Award “For his pioneering contributions to the design of high speed CMOS communication circuits”
  • 2012, IEEE VLSI Circuits Symposium Best Student Paper Award J.W. Jung and B. Razavi, “A 25-Gb/s 5-mW CMOS CDR/Deserializer,” Symposium on VLSI Circuits Dig of Tech. Papers, pp.138-139, June 2012
  • 2012, IEEE Custom Integrated Circuits Conference Best Invited Paper Award B. Razavi, “Problem of Timing Mismatch in Interleaved ADCs,” Proc. IEEE Custom Integrated Circuits Conference, Sept. 2012.
  • 2009, IEEE Custom Integrated Circuits Conference Best Invited Paper Award B. Razavi, “Challenges in the Design of Cognitive Radios,” Proc. IEEE Custom Integrated Circuits Conference, pp. 391-398, Sept. 2009.
  • 2007, UCLA Faculty Senate Teaching Award
  • 2006, Lockheed Martin Excellence in Teaching
  • 2003, IEEE Fellow
  • 2001, McGraw-Hill First Edition of the Year for the book “Design of Analog CMOS Integrated Circuits,”
  • 2001, ISSCC Beatrice Winner Award for Editorial Excellence J. Savoj and B. Razavi, “Design of Half-Rate Clock and Data Recovery Circuits for Optical Communication Systems,” Proc. Design Automation Conference, pp. 121-126, June 2001.
  • 2001, IEEE Solid-State Circuits Conference Outstanding Student Paper Award L. Der and B. Razavi, “A 2-GHz CMOS Image-Reject Receiver with Sign-Sign LMS Calibration,” Dig. International Solid-State Circuits Conference, pp. 294-295, Feb 2001.
  • 1998, IEEE Custom Integrated Circuits Conference Best Paper Award B. Razavi, “CMOS Technology Characterization for Analog and RF Design,” (Invited) Proc. of IEEE Custom Integrated Circuits Conference, pp. 23-30, May 1998.
  • 1997, TRW Innovative Teaching Award
  • 1997, ISSCC Best Panel Award
  • 1994, IEEE European Solid-State Circuits Conference Best Paper Award B. Razavi, “A 100MHz 10-mW All-NPN Sample-and-Hold Circuit with 3-V Supply,” Proc. of European Solid-State Circuits Conference, pp. 192-195, Sept. 1994.
  • 1994, ISSCC Beatrice Winner Award for Editorial Excellence B. Razavi and J. Sung, “A 6-GHz 60-mW BiCMOS Phase-Locked Loop with 2-V Supply,” Dig. of International Solid-State Circuits Conference, pp. 114-115, Feb. 1994.
  • 1994, ISSCC Best Panel Award