Chi On Chui
ELECTRICAL AND COMPUTER ENGINEERING
6730B Boelter HallEmail:
Phone: (310) 267-4786
RESEARCH AND INTERESTS
Semiconductor and electronic devices, integrated circuit manufacturing technology, bioelectronics and medical device technology, heterogeneous integration and exploratory nanotechnology
- A. Pan and C. O. Chui, “Modeling Direct Interband Tunneling. I. Bulk Semiconductors,” J. Appl. Phys., vol. 116, art. 054508, 2014.
- A. Pan and C. O. Chui, “Modeling Direct Interband Tunneling. II. Lower-Dimensional Structures,” J. Appl. Phys., vol. 116, art. 054509, 2014.
- K. Shoorideh and C. O. Chui, “On the Origin of Enhanced Sensitivity in Nanoscale FET-based Biosensors,” Proc. Natl. Acad. Sci. USA, vol. 111, no. 14, pp. 5111-5116, 2014.
- A. Pan, S. Chen, and C. O. Chui, “Electrostatic Modeling and Insights regarding Multigate Lateral Tunneling,” IEEE Trans. Electron Devices, vol. 60, no. 9, pp. 2712-2720, 2013.
- S. M. Wen and C. O. Chui, “CMOS Junctionless FET Manufacturing Cost Evaluation,” IEEE Trans. Semicond. Manuf., vol. 26, no. 1, pp. 162-168, 2013.
- K. Shoorideh and C. O. Chui, “Optimization of the Sensitivity of FET-Based Biosensors via Biasing and Surface Charge Engineering,” IEEE Trans. Electron Devices, vol. 59, no. 11, pp. 3104-3110, 2012.
- A. Pan and C. O. Chui, “A Quasi-Analytical Model for Double-Gate Tunneling Field-Effect Transistors,” IEEE Electron Device Lett., vol. 33, no. 10, pp. 1468-1470, 2012.
- Y. Mao and C. O. Chui, “Transient Measurement Approaches to Differentiate Non-Specific Binding in Affinity-Based Bioanalytical Assays,” J. Appl. Phys., vol. 112, art. 024702, 2012.
- G. Leung and C. O. Chui, “Variability Impact of Random Dopant Fluctuation on Nanoscale Junctionless FinFETs,” IEEE Electron Device Lett., vol. 33, no. 6, pp. 767-769, 2012.
- G. Leung and C. O. Chui, “Variability of Inversion-Mode and Junctionless FinFETs due to Line Edge Roughness,” IEEE Electron Device Lett., vol. 32, no. 11, pp. 1489-1491, 2011.
AWARDS AND RECOGNITION
- 2015, UCLA Henry Samueli School of Engineering and Applied Science (HSSEAS) Engineering Tech Forum Best in Engineering Poster Prize
- 2013, UCLA HSSEAS Engineering Tech Forum Student Poster Competition 3rd Prize
- 2013, UCLA HSSEAS Bioengineering Capstone Design Symposium Student Poster Presentation 1st Prize
- 2011, UCLA HSSEAS Northrop Grumman Excellence in Teaching Award
- 2011, UCSD von Liebig Entrepreneurism Center 2011 Regional Health Care Innovation Challenge Award
- 2011, University of California, Los Angeles Faculty Career Development Award
- 2011, Chinese American Faculty Association (CAFA) Robert T. Poe Faculty Development Award
- 2010, The 25th IEEE International Symposium on Defect and Fault in VLSI Systems (DFT’10) Best Student Paper Award P. Narayanan, M. Leuchtenburg, J. Kina, P. Joshi, P. Panchapakeshan, C. O. Chui, and C. A. Moritz, “Parameter Variability in Nanoscale Fabrics: Bottom-Up Integrated Exploration,” Proc. 25th IEEE Int. Symp. Defect and Fault Tolerance in VLSI Syst. (DFT’10), pp. 24-31, Kyoto, Japan, October 6-8, 2010.
- 2009, IEEE Electron Devices Society Early Career Award ((http://eds.ieee.org/early-career-award.html)
- 2004, The 13th Workshop on Dielectrics in Microelectronics (WoDiM 2004) Best Paper Award H. Kim, P. C. McIntyre, C. O. Chui, K. Saraswat, and S. Stemmer, “Engineering Chemically Abrupt High-k Metal Oxide/Silicon Interfaces Using Oxygen-Gettering Metal Overlayers,” The 13th Wrkshp. Dielectrics in Microelectronics (WoDiM 2004), Paper 4a-2, Kinsale, Ireland, June 28-30, 2004.
- 2003, The 60th IEEE Device Research Conference (DRC) Best Student Paper Award C. O. Chui, S. Ramanathan, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, “Ultrathin High-k Gate Dielectric Technology for Germanium MOS Applications,” IEEE 60th Annual Dev. Res. Conf. (DRC) Dig., Paper VII.B-2, pp. 191-192, Santa Barbara, CA, June 24-26, 2002.