Chi On Chui

Chi On Chui

ASSOCIATE PROFESSOR
ELECTRICAL AND COMPUTER ENGINEERING

6730B Boelter Hall

Email:
Phone: (310) 267-4786

Websites

RESEARCH AND INTERESTS
Semiconductor and electronic devices, integrated circuit manufacturing technology, bioelectronics and medical device technology, heterogeneous integration and exploratory nanotechnology
PUBLICATIONS
AWARDS AND RECOGNITION
  • 2015, UCLA Henry Samueli School of Engineering and Applied Science (HSSEAS) Engineering Tech Forum Best in Engineering Poster Prize
  • 2013, UCLA HSSEAS Engineering Tech Forum Student Poster Competition 3rd Prize
  • 2013, UCLA HSSEAS Bioengineering Capstone Design Symposium Student Poster Presentation 1st Prize
  • 2011, UCLA HSSEAS Northrop Grumman Excellence in Teaching Award
  • 2011, UCSD von Liebig Entrepreneurism Center 2011 Regional Health Care Innovation Challenge Award
  • 2011, University of California, Los Angeles Faculty Career Development Award
  • 2011, Chinese American Faculty Association (CAFA) Robert T. Poe Faculty Development Award
  • 2010, The 25th IEEE International Symposium on Defect and Fault in VLSI Systems (DFT’10) Best Student Paper Award P. Narayanan, M. Leuchtenburg, J. Kina, P. Joshi, P. Panchapakeshan, C. O. Chui, and C. A. Moritz, “Parameter Variability in Nanoscale Fabrics: Bottom-Up Integrated Exploration,” Proc. 25th IEEE Int. Symp. Defect and Fault Tolerance in VLSI Syst. (DFT’10), pp. 24-31, Kyoto, Japan, October 6-8, 2010.
  • 2009, IEEE Electron Devices Society Early Career Award ((http://eds.ieee.org/early-career-award.html)
  • 2004, The 13th Workshop on Dielectrics in Microelectronics (WoDiM 2004) Best Paper Award H. Kim, P. C. McIntyre, C. O. Chui, K. Saraswat, and S. Stemmer, “Engineering Chemically Abrupt High-k Metal Oxide/Silicon Interfaces Using Oxygen-Gettering Metal Overlayers,” The 13th Wrkshp. Dielectrics in Microelectronics (WoDiM 2004), Paper 4a-2, Kinsale, Ireland, June 28-30, 2004.
  • 2003, The 60th IEEE Device Research Conference (DRC) Best Student Paper Award C. O. Chui, S. Ramanathan, B. B. Triplett, P. C. McIntyre, and K. C. Saraswat, “Ultrathin High-k Gate Dielectric Technology for Germanium MOS Applications,” IEEE 60th Annual Dev. Res. Conf. (DRC) Dig., Paper VII.B-2, pp. 191-192, Santa Barbara, CA, June 24-26, 2002.

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